FPGA EDA Tool Researcher

Job description:

FPGA EDA Tool Researcher – Job Order 3367

Northern VA near Washington DC
Must be a US citizen
$132,700 – $150,000

My client, a technology research organization, is looking for highly talented, motivated researchers to lead and impact state of the art research and development in the area of reconfigurable computing. This position will lead research in algorithm development for custom internal tools which target FPGA and ASIC front end design. These tools solve challenging problems in hardware security, high level abstraction for hardware design, and machine learning acceleration for critical systems. Realize effectiveness of solutions on physical FPGAs and custom ASIC fabrication. Lead research, propose major innovations, collaborate with peers within the group and across the company, publish results in top tier conferences, and contribute to or lead proposals.

Qualifications:

  • PhD or MS and equivalent experience in Computer Engineering, Electrical Engineering, or Computer Science required.
  • Previous publications, patents, or innovations related to FPGA CAD tool algorithms (synthesis, partitioning, mapping, placing, routing), design automation, hardware trust, assurance, and security, or computer architecture.
  • Strong software development (C++/Java/Python) and hardware design (VHDL/Verilog/System Verilog) experience.
  • Expert level use of Xilinx, Intel, or Lattice FPGA implementation tools.
  • Must be in or willing to relocate to the Arlington, VA area.
  • Qualified candidates for this position must be willing and eligible to apply for a Top Secret clearance. Eligibility for this clearance requires U.S. citizenship. Current SECRET clearance or higher is a plus.

Preferred Job Qualifications:

  • Experience using or contributing to open-source EDA tools such as Torc, RapidWright, ABC, VPR, VTR, RapidSmith, nextpnr, prjXray.
  • Understanding of Machine Learning with applications to hardware systems, including training and inference.
    Experience with software revision control systems such as Git, Mercurial, SVN and CI/CD development workflows.
  • Minimum Education: Master’s degree, Combined experience/education as substitute for minimum education Minimum Experience: 3 years Minimum Field of Expertise: Knowledge of research processes and computer science.

Why is This a Great Opportunity:

Candidates will gain the deepest understanding of FPGA and ASIC design working with the most advanced technology.

Salary Type : Annual Salary

Salary Min : $ 132000

Salary Max : $ 150000

Currency Type : USD